1. Field of the Invention
This invention relates to an interposer and method for producing same. More specifically, the present invention provides for an interposer with at least one optical waveguide, and a method for producing a light-guiding structure.
2. Description of the Prior Art
Silicon interposers have been used in integrated circuit packages to provide high density and functionality of the packages. A silicon interposer can perform several functions. It can contain imbedded passive components, bringing them closer to the chip and, therefore, reducing parasitic interconnect inductance. It allows coefficient of thermal expansion matching between the integrated circuit and printed circuit board, and therefore, improves mechanical robustness of the package. With increase of operational frequencies of integrated circuit""s and interconnect density, inter-chip transmission line delays become a very important issue.
The major causes for these delays are capacitive loading of the lines and the line resistivity, which both limit the phase velocity of the propagating signal. To reduce resistivity and capacitive delays the following two approaches may be used: decreasing dielectric constant of the interlayer dielectric, and reducing the metal line resistivities. Both approaches have very strong physical limitations. A great advantage of an optical interconnect is that it is free of capacitive loading and also there is no cross-coupling between optical signals propagating in waveguides, even at a very close distance from each other. Transmission over optical lines is thus much faster compared to their electrical counterparts. Moreover, light can be transmitted through free-space that can also be useful for vertical signal transmission. This can find a broad range of application in three dimensional structures. Therefore, what is needed and what has been invented is an interposer without the features of capacitive loading of the lines and line resistivity.
The present invention provides a method for producing light-guiding structure comprising providing a substrate (e.g., a silicon substrate) having a top substrate surface; forming in the substrate a lower cladding layer (e.g., a silicon cladding layer) having a lower porosity value; forming in the substrate a waveguide core layer in contact with the lower cladding layer and having a porosity value less than the porosity value of the lower cladding layer; and forming in the substrate an upper cladding layer (e.g., a silicon cladding layer) in contact with the waveguide core layer and having a porosity value greater than the porosity value of the waveguide core layer. The method of the present invention further provides terminating the lower cladding layer, the waveguide core, and the upper cladding layer in the top substrate surface. The upper cladding layer has a top cladding surface which is preferably generally aligned with the top substrate surface. The porosity value of the lower cladding layer generally equals the porosity value of the upper cladding layer. The upper cladding layer, the waveguide core layer, and the lower cladding layer are preferably formed in sequence by electrochemical etching, commencing with the upper cladding layer. After formation, the three formed layers may be simultaneously expanded by oxidation. Thus, the waveguide core layer may be expanded (e.g., by oxidizing) simultaneously with the upper cladding layer and the lower cladding layer.
The present invention also provides a method for producing an interposer comprising: providing a substrate; forming in the substrate a lower cladding layer having a lower cladding density value; forming in the substrate a waveguide core layer in contact with the lower cladding layer and having a core density value greater than the density value of the lower cladding layer; and forming in the substrate an upper cladding layer in contact with the waveguide core layer and having density value less than the core density value.
The present invention further also provides an interposer comprising a silicon body having a silicon surface, a lower cladding layer including a pair of lower opposed cladding layer ends and extending through the silicon body and having the lower opposed cladding layer ends terminating in the silicon surface. A core layer is formed to include a pair of opposed core layer ends and extend through the silicon body in contact with the lower cladding layer and having the opposed core layer ends terminating in the silicon surface. The interposer also includes an upper cladding layer including an upper cladding surface and disposed in the silicon body in contact with the core layer and such that the upper cladding surface is generally aligned with the silicon surface. The lower cladding layer and the upper cladding layer preferably have a porosity ranging from about 40% to about 60%. The core layer has a porosity which is less than the porosity of the lower and upper cladding layers. The core layer preferably has a porosity ranging from about 25% to about 50%.